By the way, the reason the address->IC mapping is non-trivial is for performance reasons.
If you were, for example, iterating over a column of a 2D array with a stride equal to some power of two, you'd end up hitting the same IC repeatedly. This limits your bandwidth to that of a single IC, rather than balancing it over all of them. (I'm simplifying a little, but that's the gist)
So they try to "swizzle" things, using a formula like the one in the article.
On 80's arcade games and home computers you can try piggybacking a known working RAM chip onto each of the RAMs for a quick diagnosis, if you're lucky (it doesn't always work).
Alternatively, could you stress test the failing addresses while selectively heating each chip in turn with a hot air gun and checking if the error rate changes?
If you were, for example, iterating over a column of a 2D array with a stride equal to some power of two, you'd end up hitting the same IC repeatedly. This limits your bandwidth to that of a single IC, rather than balancing it over all of them. (I'm simplifying a little, but that's the gist)
So they try to "swizzle" things, using a formula like the one in the article.