While there are clear inefficiencies in FPGA tooling, I can assure you the complexity of the tooling is 2 or 3 orders of magnitude higher than microcontrollers.
Not that I don't wish to have tooling available for me to modify, but I also understand this is thousand years of man work right there...
The issue is it's locked away in proprietary garbage and has been for decades. There just isn't the same level of interest for FPGAs as there is for micro-controllers or embedded linux platforms.
I don't doubt your thousand hour quote. But at the same time I'd say there is probably 10k years of garbage and cruft built in the current toolsets.
FPGAs need an LLVM moment. Right now, the current set of HDLs available are terribly unergonomic and pretty much re-implemented for each FPGA provider. We are roughly at the K&R C era for FPGAs. To get out of that, we need good middleware and open standards.
Once that happens, I think we can finally start making some real higher level hardware description languages. FPGA programing, in particular, seems like it would be fairly amenable to functional programming concepts.
Compare iverilog to VCS or xcelium, while it's brilliant, it's not even close in features or performance, and there is nothing preventing the OSS community from making it better, so the question is why? is it just a lack of people with the right mix of skills (both SW and HW is rare enough), or something else?
Synthesis, place and route are all much harder than simulation, so I don't think tools like vivado would suddenly be better if open sourced. Also I think vivado is great, but I seem to be in the minority on that one, but I guess it's my perspective as a HW designer dealing with HW tools all my life, vivado is a breath of fresh air.
Not that I don't wish to have tooling available for me to modify, but I also understand this is thousand years of man work right there...